Business Wire

FADU Technology Announces a Flash Memory Summit Keynote by CEO Jihyo Lee and guest Ross Stenfort of Meta to discuss System-level Storage Challenges seen in Hyperscale Data Centers

The "Challenges and Opportunities for Designing Efficient SSDs for Datacenters" keynote will be of interest to all data center operators, designers, and engineers SANTA CLARA, Calif.--(BUSINESS WIRE)- ...
TweakTown

China's Innosilicon LPDDR6/5X memory controller IP delivered to first customers, up to 14.4Gbps

Use left and right arrow keys to seek audio. Chinese chip maker Innosilicon has announced it has provided its domestic customers with its new LPDDR6/5X memory controller IP. Innosilicon's new ...
Semiconductor Engineering

Setting The Memory Controller Free From Managing DRAM Maintenance Ops (ETH Zurich)

A new technical paper titled “A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations” was published by ...
SiliconANGLE

XCENA raises $135M for its computational memory controller

XCENA Inc., a startup with a memory device designed to speed up artificial intelligence clusters, today announced that it has raised $135 million in funding. The Series B round was led by Korean funds ...
Nature

An energy efficient processor array and memory controller for accurate processing of convolutional neural network-based inference engines

Exploiting unstructured sparsity in the hardware accelerator of a Convolutional Neural Networks (CNNs) based inference can improve energy efficiency. However, it needs a complex controller for ...