Abstract: This brief reports a 200 V all-SiC integration process platform integrating low-voltage (LV) and high-voltage (HV) devices, such as LV nMOS, LV pMOS, resistor, capacitor, HV lateral DMOS ...
Abstract: This paper presents a thin-film wafer-level encapsulation process based on an epitaxial deposition seal that incorporates both narrow and wide lateral transduction gaps (0.7-50 μm), both ...
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