Design And Reuse

Menta Contributes to the Successful Completion of the European Processor Initiative and Confirms its Role in Shaping Future Computing Architectures

The successful final review of EPI SGA2 highlights Menta's contributions in embedded programmability, design tool acceleration, and eFPGA architectures for next-generation high-performance computing.

QuickLogic: Improving Growth Case, But The Valuation Is Still Asking A Lot

Hold after a 50% selloff. See Intel 18A, RadPro, and storefront strategy drivers, plus valuation and catalyst risks—read now.
Le Lézard

Embedder and Verkor Partner to Take Agentic AI From Chip Design to Working Firmware

Embedder, the AI coding agent for firmware and embedded systems, and Verkor, the company behind the autonomous chip design system Conductor, today announced a partnership linking AI-driven silicon ...
Design And Reuse

CAST Expands Functional Safety IP Line with ASIL B Ready SENT/SAE J2716 Receiver Core

The ASIL B Ready CSENT-RX receiver expands CAST’s line of Functional Safety IP cores for automotive and other safety-critical designs, which includes processor, CAN, LIN, Ethernet MAC, SafeSPI, serial ...
Digi Times

RISC-V will be 'default ISA of choice' for all new chip designs, architecture's CEO predicts

Andrea Gallo, CEO of RISC-V International, used his appearance at the MIPS Forum during Computex 2026 to declare that RISC-V has completed its transition from academic project to industrial standard — ...
Semiconductor Engineering

RISC-V And GPU Synergy In Practice: A Path Toward High-Performance SoCs

With the rapid growth of edge AI and high-performance computing demands, the division of roles within the processor industry is beginning to shift. Recent moves from the dominant CPU IP supplier has ...
Forbes

SiFive's $400M Round Signals A RISC-V Moment In AI Data Centers

This voice experience is generated by AI. Learn more. This voice experience is generated by AI. Learn more. For years, a quietly disruptive force has been building in the semiconductor industry, ...
IEEE

The RISC-V FPGA (RVfpga) Teaching Package

Abstract: RISC-V is a free and open-standard ISA based on RISC principles, allowing anyone to design, manufacture, and sell RISC-V chips and software. Its flexibility and growing ecosystem have made ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
Forbes

RISC-V’s Ascent Could Reshape The Global Compute Landscape

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...
HotHardware

NVIDIA Confirms CUDA Support Is Coming To RISC-V And It's A Huge Deal

Old-timers might recall the idea of "RISC" as a once-upon-a-time processor design ideology. RISC processors were mostly used for servers from Sun Microsystems, DEC, and other companies of a bygone era ...